1. Field of the Invention
The present invention relates to a semiconductor device of high withstand voltage and a method of manufacturing the same.
2. Description of the Related Art
Generally, in power semiconductor devices of a high withstand voltage and a large area, a p-type base must be deeply diffused into an n-type semiconductor wafer of a high sheet resistance to the depth of approximately 60 .mu.m to 120 .mu.m, for example. Since such a deep diffusion of p-type impurity is required, Al or Ga is generally used for the impurity for forming the n-type base of the power semiconductor device, taking a diffusion time and a uniformity of diffused impurity in a plane into consideration. Al or Ga rejects the selective diffusion by using an oxide film, however. For this reason, use of Al or Ga is inconvenient for manufacturing some specific types of power semiconductor devices such as PIN diodes and thyristors having low resistance n-type buffer layers and gate turn-off thyristors (GTOs).
A sectional view of a conventional GTO with an anode short structure using an n-type buffer layer, is shown in FIG. 1. An impurity profile with respect to a depth of impurity diffusion of the GTO is illustrated in FIG. 2. In FIG. 1, reference numeral 111 designates an n-base layer; 112 a p-base layer; 113 an n emitter layer; 114 an n buffer layer; 115 a p-emitter layer; 116 a cathode electrode; 117 an anode electrode; 118 a gate electrode.
As known, in the GTO having the n buffer layer as shown, presence of the n buffer layer allows the n-base layer to be thin in thickness. Accordingly, the GTO is improved in the on state-voltage and the switching characteristic. This type of the GTO, however, is disadvantageous in that the back-power withstand is remarkably reduced, and hence it is difficult to mass produce practical power semiconductor devices of high withstand voltage at a high production yield. A design of the n buffer layer of a low impurity concentration and a further depth of diffusion may cure the GTO of the above drawback to some extent. Such GTOs requires a long process to manufacture, and the manufactured GTOs are poor in reliability. This will be described in more details.
In ordinary GTOs of high withstand voltage, the p-base layer is formed by the diffusion of a impurity of a high diffusion efficiency, such as Al and Ga. A diffusion depth denoted as xjpb in FIG. 2 is ordinarily 60 to 120 .mu.m. Accordingly, a sheet resistance .rho.spb of the n emitter layer 113 after the n emitter layer 113 is formed is approximately 50 to 75 ohms/.quadrature.. Thus, the diffusion depth xjpb is so deep. Further, a high withstand voltage of several thousands V must be obtained for a large area of 7 to 80 cm.sup.2, for example. Al or Ga has a large diffusion coefficient, and therefore, when it is used for the impurity for the p-base layer, the diffusion will be completed for a relatively short time. It is for this reason that the material Al or Ga is used for forming the p-base layer 112. When this type of material is used, however, an oxide film that is to mask the entire surface of the structure cannot be used for preventing the "out-diffusion". A conventional process employed to cope with this is to simultaneously form the p-base layer 112 and the p-emitter layer 115. Another conventional process is to simultaneously form these layers, to remove the p-emitter layer, to form the n-buffer layer 114 or an anode-short, and finally to form a thin p-emitter layer.
In the latter process, when the diffusion layer closer to the anode is formed, an additional diffusion of boron is frequently performed, in order to prevent an impurity concentration in the surface region of the p-layer 112 from being reduced.
For forming the p-base layer 112, ion implantation of Al or Ga is frequently employed. In this case, in order to prevent the out diffusion, a film other than an oxide film, for example, a nitride film, is formed on the surface of the structure, and a p-base layer is formed by diffusion process.
Important factors to determine the characteristics of the GTO with the anode short structure containing the n-buffer layer a sheet resistance .rho.spb of the p-base layer 112 and that of the n-buffer layer 114. See FIG. 2. A value of .rho.spb of the p-base layer 112 depends on how a diffusion depth xjne of the n-emitter layer 113 is selected with respect to an impurity profile of the p-base layer 112. An accuracy of this diffusion is approximately .+-.0.5 .mu.m, and the diffusion depth xjne greatly affects a production yield in the GTOs production. The present determination of this diffusion depth xjne consists of computing an impurity profile of the p-base layer for each lot of diffusion by a computer, and predicting the diffusion conditions for the diffusion depth xjne on the basis of the data thus far collected.
The profile control of the impurity concentrations of the p-base layer of Al or Ga formed by diffusion process fails to satisfy the design requirements. To cope with this, a special measure has been taken to satisfy the design requirements of the concentration impurity control. For the material of Al, the material is previously introduced onto the inner wall of the Si tube, a wafer is introduced into the tube, and it is heated to diffuse the material of Al into the wafer. For the material of Ga, a Ga-Ge diffusing method is used. These diffusing methods, however, are still unsatisfactory to secure the reproduction of an intended profile. To make up for this, the results of computation by a computer and the collected and accumulated data are used to stabilize the reproduction yield. Since the masking effect of an oxide film for a source of Al or Ga is unsatisfactory, it is customary to simultaneously form the p-base layer and the p-emitter layer. In the case of the GTO of FIG. 1, the p-base layer 112 and the p-emitter layer 115 must be 60 .mu.m in width in preparation for the subsequent formation of the n-emitter layer 113. Accordingly, the width of the n-buffer layer 114 must be at 100 .mu.m. This figure indicates that it is almost impossible to form such a wide n-buffer layer 114 cannot be formed by the diffusion process. By convention, an epitaxial growing method is often used for forming the n-buffer layer. The epitaxial layers formed by the method, however, are poor in the uniformity in the withstand voltages and in reliability, and increased in the number of process steps to manufacture the GTOs.
There is another method to manufacture the GTO in which the n-buffer layer 114 is formed by diffusing phosphorus, and the p-base layer is formed by ion implanting Al or Ga into the wafer and a subsequent diffusion of the impurity. In this method, a mask member other than the oxide film is required. The n-buffer layer of a low concentration cannot be diffused simultaneously with the p-base layer. At least two diffusion processes are required for forming a deep n-buffer layer, which increases the number of process steps.
In the GTO not having an n-buffer layer, the most important diffusion parameter to determine the characteristic after the base diffusion is only the sheet resistance .rho.spb. In the GTO of the anode short structure using the n-buffer layer, both the sheet resistances of, .rho.spb and .rho.sn must be considered after the base diffusion. The prior process has a limit of handling this.